108 2023 upper austria English-speaking jobs in Carinthia

Christoph PFENNICH Head of Suite-Development Upper Austria Discover more here +43 57 112 - 0

Christoph PFENNICH Head of Suite-Development Upper Austria Discover more here +43 57 112 - 0

Christoph PFENNICH Head of Suite-Development Upper Austria Discover more here +43 57 112 - 0

English level: Upper-Intermediate or higher.

English level: Upper-Intermediate or higher.

Technologies (all genders) // Job-ID: 165-1 VILLACH Full-time Your future responsibilities Silicon Austria ... to lead and coordinate the Research Unit “Magnetic Microsystem Technologies” (MMT) based in Villach, Austria

About the Role Join our team as a Data Center Technician in Klagenfurt am Wörthersee, Austria.

;re looking for Student of HTL Electric Engineering Electronic Engineering Valid Work-Visa for Austria ... on the spot the most important information about living, working and studying in and around Villach/Austria

Head of Research Unit – Magnetic Microsystem Technologies (all genders) // Job-ID: 165-1 Silicon Austria ... to lead and coordinate the Research Unit “Magnetic Microsystem Technologies” (MMT) based in Villach, Austria

we're looking for Student of HTL Electric Engineering Electronic Engineering Valid Work-Visa for Austria ... on the spot the most important information about living, working and studying in and around Villach/Austria

Be part of Silicon Austria Labs. ... Photonic Integrated Circuit Design and PDK development (all genders) // Job-ID: 203-1 role at Silicon Austria ... Become part of Silicon Austria Labs This is a unique chance to accelerate your scientific career at ... Photonic Integrated Circuit Design and PDK development (all genders) // Job-ID: 203-1 role at Silicon Austria ... Klagenfurt, Carinthia, Austria 2 weeks ago Senior Research Engineer / Scientist - Ion-trap chips (all

For our location in Klagenfurt/Austria, which specializes in the development of wind turbines, we are ... AMSC Austria GmbH, Feldkirchner Straße 138, 9020 Klagenfurt a.W., +43 463 444 604 0 About this job ... Unfilled vacancies: 1 vacancy unfilled for this position About the company Employer: AMSC Austria

About the Role Join our team as a Data Center Technician in Klagenfurt, Austria.

About the Role Join our team as a Data Center Technician in Klagenfurt am Wörthersee, Austria.

As a Staff Engineer Mixed Signal Layout, you will plan, estimate, and execute mixed-signal floorplans for IP macros and subsystems. You will drive analog full-custom layout implementation and perform layout verification. You will collaborate with circuit designers and layout teams to ensure seamless integration.

Develop and support tools, methodologies, and design flows for RF/mmW Codesign. Anticipate the needs of hardware design projects and ensure best-in-class methodologies for RF module design.

Execute and implement automation ideas for analog design flows, collaborating with designers to define frameworks and provide support. Design, implement, and maintain Python libraries, CLI tools, and interfaces to CAD tools (e.g., Cadence Spectre, Mentor Calibre). Integrate with HPC schedulers and server farms to enable scheduled runs, caching, and optimize throughput. Develop and integrate new methods, tools, and features into the physical design automation flow.

Senior Staff Engineer will lead technical go-to-market activities and support Field Application Engineering and Sales for semiconductor solutions in robotic applications. Responsibilities include providing technical proposals, system concept verification, training, and 3rd level support. Requires a university degree in Electrical Engineering or similar, 5+ years of experience in the semiconductor/power electronics industry, and deep understanding of power electronic converter topologies.

Develop and optimize SiC epitaxy single process solutions for world-class devices. Hand over qualified processes to the production team and collaborate with technology development and production. Requires a master's degree or PhD in Physics, Applied Chemistry, or Material Science and at least 5 years of experience in SiC epitaxy. Fluent English skills are required, German is a plus.

Senior Staff Engineer Digital Verification will create and define verification plans for mixed signal designs, develop verification environments in SystemVerilog using UVM and Constrained Random approach, and execute tests on RTL and gate-level. The role requires 6+ years of experience in Digital Verification, expertise in SystemVerilog, UVM, and verification tools, and knowledge of RTL design and digital or mixed-signal circuits.